Re: SDIO driver

That is a lot of code to sort through, and I don't have time. Did you start
the clock to the SD Controller itself? Then did you enable the clock output
from the SD Controller?

Have you looked at the SD driver that comes with the MainstoneII/III in the
CSP?

--
Bruce Eitman (eMVP)
Senior Engineer
Bruce.Eitman AT EuroTech DOT com
My BLOG http://geekswithblogs.net/bruceeitman

EuroTech Inc.
www.EuroTech.com

"vish" <vish@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:45B783F7-3B5E-42A6-97C4-B3E3322D5843@xxxxxxxxxxxxxxxx
Hi,

I wrote a piece of code to talk directly to the SDIO controller of PXA270.
But not able to make the SDIO controller start generating the clock and
communicate to the WiFi chip. The code is as below. If anybody have any
idea
whether I am doing correct or any steps are missing, please let me know.

regards
Vish

/****************************************************************************
*
* WiFiGPIO.c - low level functions for manipulation
* of the WiFi Port power control -DN 10/2/07
*
*****************************************************************************/

#include <windows.h>
#include <bsp.h>
#include <bulverde.h>
#include <bulverde_mmc.h>
#include <oal_memory.h>
#include <dbgserial.h>
#include <bulverde_base_regs.h>



// Pointer to GPIO Registers
XLLP_GPIO_T *pGPIORegs = NULL;
volatile BULVERDE_MMC_REG *pMMCRegs = NULL;
//PBULVERDE_MMC_REG *pMMCRegs;


void MMCGpio_Init(void)
{
int response[16], x;
DWORD dwRegVal;
//pGPIORegs = (XLLP_GPIO_T *) OALPAtoVA(BULVERDE_BASE_REG_PA_GPIO, FALSE);
//volatile PBULVERDE_GPIO_REG pGPIORegs = (PBULVERDE_GPIO_REG)
OALPAtoVA(BULVERDE_BASE_REG_PA_GPIO, FALSE);

pGPIORegs = (XLLP_GPIO_T *) OALPAtoVA(BULVERDE_BASE_REG_PA_GPIO, FALSE);
pMMCRegs = (BULVERDE_MMC_REG *) OALPAtoVA(BULVERDE_BASE_REG_PA_MMC,
FALSE);


// NKDbgPrintfW(TEXT("WiFi GPIO Initialized (WiFi Power ON)® "));

///////////////////////////////////
pGPIORegs->GPCR0 = XLLP_BIT_17; // Enable WiFi power pin,
pGPIORegs->GPDR0 |= XLLP_BIT_17; // and configure its direction as an
output...
pGPIORegs->GPSR0 = XLLP_BIT_17;
//////////////////////////////////////////////////////////
// Configure GPIO_32 as Alternate Function 2 out (MMC_CLK)
// assume that the MMC_CLK is active-low signal driven

dwRegVal = pGPIORegs->GPCR1;
dwRegVal |= 0x00000001;
pGPIORegs->GPCR1 = dwRegVal;


pGPIORegs->GPCR1 = XLLP_BIT_0; // Enable WiFi power pin,
pGPIORegs->GPDR1 |= XLLP_BIT_0; // and configure its direction as an
output...
pGPIORegs->GPSR1 = XLLP_BIT_0;

// change the direction to OUT
dwRegVal = pGPIORegs->GPDR1;
dwRegVal |= 0x00000001;
pGPIORegs->GPDR1 = dwRegVal;

// change to Alternate Function 2
dwRegVal = pGPIORegs->GAFR1_L;
dwRegVal = ( dwRegVal & 0xfffffffc ) | 0x00000002;
pGPIORegs->GAFR1_L = dwRegVal;

KITLOutputDebugString ( "GPSR1_L VALUE 0x%X® ", pGPIORegs->GAFR1_L);
//KITLOutputDebugString ( "AFTER MMCLK INIT ® ");
//////////////////////////////////////////////////////////
// Configure GPIO_112 as Alternate Function 1 (MMC_CMD)

// assume that the MMC_CLK is active-high signal driven
dwRegVal = pGPIORegs->GPSR3;
dwRegVal |= 0x00010000;
pGPIORegs->GPSR3 = dwRegVal;
// change the direction to OUT
dwRegVal = pGPIORegs->GPDR3;
dwRegVal |= 0x00010000;
pGPIORegs->GPDR3 = dwRegVal;
// change to Alternate Function 1
dwRegVal = pGPIORegs->GAFR3_U;
dwRegVal = ( dwRegVal & 0xfffffffc ) | 0x00000001;
pGPIORegs->GAFR3_U = dwRegVal;

KITLOutputDebugString ( "GAFR3_U VALUE 0x%X® ", pGPIORegs->GAFR3_U);
// KITLOutputDebugString ( "AFTER MMCMD INIT ® ");
//////////////////////////////////////////////////////////
// Configure GPIO_92 as Alternate Function 1 (MMC_DAT0)

// assume that the MMC_CLK is active-high signal driven
dwRegVal = pGPIORegs->GPSR2;
dwRegVal |= 0x10000000;
pGPIORegs->GPSR2 = dwRegVal;
// change the direction to OUT
dwRegVal = pGPIORegs->GPDR2;
dwRegVal |= 0x10000000;
pGPIORegs->GPDR2 = dwRegVal;
// change to Alternate Function 1
dwRegVal = pGPIORegs->GAFR2_U;
dwRegVal = ( dwRegVal & 0xfcffffff ) | 0x01000000;
pGPIORegs->GAFR2_U = dwRegVal;
//////////////////////////////////////////////////////////

// Configure GPIO_109-GPIO_111 as Alternate Function 1 (MMC_DAT1-MMC_DAT3)

// assume that the MMC_CLK is active-high signal driven
dwRegVal = pGPIORegs->GPSR3;
dwRegVal |= 0x0000e000;
pGPIORegs->GPSR3 = dwRegVal;
// change the direction to OUT
dwRegVal = pGPIORegs->GPDR3;
dwRegVal |= 0x0000e000;
pGPIORegs->GPDR3 = dwRegVal;
// change to Alternate Function 1
dwRegVal = pGPIORegs->GAFR3_L;
dwRegVal = ( dwRegVal & 0x03ffffff ) | 0x54000000;
pGPIORegs->GAFR3_L = dwRegVal;
//Delay(1000);//wait 1ms per MMC specification
msWait(100);
pMMCRegs->strpc = 0x00000001;//stop clock


//Check if clock is enable state again
while((pMMCRegs->stat & 0x00000100) == 0x00000100); //wait for clock to
stop

KITLOutputDebugString ( "WAITING FOR CLOCK TO STOP ® ", pMMCRegs->stat);

pMMCRegs->resto = 0x0000007f;//set response timeout to max value (64
clocks)
//Setting the Clock speed
pMMCRegs->clkrt = 0x00000006;//set MMCLK rate to 312.5kHz

KITLOutputDebugString ( "CLKRT VALUE 0x%X® ", pMMCRegs->clkrt);

pMMCRegs->cmd = 0x00000000;//CMD02 index ALL_SEND_CID
pMMCRegs->argh = 0x00000000;//stuff bits for argument
pMMCRegs->argl = 0x00000000;//stuff bits for argument
//No response is needed
pMMCRegs->cmdat = 0x00000000;//expect no response
//writing 1 to first bit position will start the clock
pMMCRegs->strpc = 0x00000002;//start clock

if(pMMCRegs->stat & 0x00000100)
{
KITLOutputDebugString ( "CLOCK ENABLED ® ");
}
else
{
KITLOutputDebugString ( "CLOCK NOT ENABLED ® ");
}
if(pMMCRegs->stat & 0x00000002)
{
KITLOutputDebugString ( "CARD RESP TIMEOUT ® ");
}
else
{
KITLOutputDebugString ( "NO CARD RESP TIMEOUT ® ");
}

KITLOutputDebugString ( "PIN STATUS GPLR1 0x%X® ", pGPIORegs->GPLR0);
KITLOutputDebugString ( "PIN STATUS GPLR1 0x%X® ", pGPIORegs->GPLR1);
KITLOutputDebugString ( "PIN STATUS GPLR2 0x%X® ", pGPIORegs->GPLR2);
KITLOutputDebugString ( "PIN STATUS GPLR3 0x%X® ", pGPIORegs->GPLR3);

KITLOutputDebugString ( "MSTAT VALUE 0x%X® ", pMMCRegs->stat);

while((pMMCRegs->stat & 0x00002000) == 0x00000000);//wait for end_cmd_res

KITLOutputDebugString ( "AFTER CLK SET INIT ® ");

//CMD55 APP_CMD
//This command must be sent every time before an application command
pMMCRegs->strpc = 0x00000001;//stop clock
while((pMMCRegs->stat & 0x00000100) == 0x00000100); //wait for clock to
stop
pMMCRegs->cmd = 0x00000037;//CMD55 index APP_CMD
pMMCRegs->argh = 0x00000000;//relative card address 0x0
pMMCRegs->argl = 0x00000000;//stuff bits
pMMCRegs->cmdat = 0x00000001;//expect response 1
pMMCRegs->strpc = 0x00000002;//start clock
while((pMMCRegs->stat & 0x00002000) == 0x00000000);//wait for end_cmd_res
//read response FIFO
for(x=0;x<3;x++)
{
response[x] = pMMCRegs->res & 0x0000ffff;
}
KITLOutputDebugString ( "® AFTER CMD55 INIT ® ");

//ACMD41
pMMCRegs->strpc = 0x00000001;//stop clock
while((pMMCRegs->stat & 0x00000100) == 0x00000100); //wait for clock to
stop
pMMCRegs->clkrt = 0x00000006;//set MMCLK rate to 312.5kHz
pMMCRegs->cmd = 0x00000029;//ACMD41 index SD_APP_OP_COND
pMMCRegs->argh = 0x00000020;//set voltage limit of system in command
argument
pMMCRegs->argl = 0x00000000;
pMMCRegs->cmdat = 0x00000043;//set init bit for initial 80 clocks, expect
response 3
pMMCRegs->strpc = 0x00000002;//start clock
while((pMMCRegs->stat & 0x00002000) == 0x00000000);//wait for end_cmd_res
//read response FIFO
for(x=0;x<3;x++)
{
response[x] = pMMCRegs->res & 0x0000ffff;
}
KITLOutputDebugString ( "® AFTER CMD41 INIT ® ");
KITLOutputDebugString ( "® SUCCESS ® ");
NKDbgPrintfW(TEXT("WiFi GPIO Initialized (WiFi Power ON)® "));
}



"Dean Ramsier" wrote:

You'll have to implement the functionality yourself. That means
initializing the controller and sending the commands necessary to query
the
device. None of this is done for you but you can look at the existing
block/bus drivers for examples on what you need to do.

--
Dean Ramsier - eMVP
BSQUARE Corporation


"vish" <vish@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:EB751575-0F16-4EF3-906C-CBE3A5E11E37@xxxxxxxxxxxxxxxx
Hi,

I am using WinCE 6.0 and the platform is a custom platform derived from
ARMV4I and having PXA270 processor.

A WiFi chip is connected to the processor via the SDIO lines with 4
data
lines, a command line and a clock line. When the system boots up and
before
the OS is loaded, inside the bootlaoder, I want to check whether the
WiFi
exists and communicates with the main processor.

Since I am trying this in bootloader, I cannot use any SDIO driver.
Does
anybody have any idea on how this can be achieved?

regards
Vish





.

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