Re: ARM926EJ-S MMU Problem in WinCE5.0

- clean the caches
- ensure that the CPU pipeline is full and that you jump to the physical address at exactly the correct time. I am no sure how deep the prefetch piece fo rthe pipeline is - I think 3 instructions but I put an extra NOP to be safe.

See this (ARM926 TRM, section 2.3.8):
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0198d/DDI0198_926_TRM.pdf


Try this:

; Physical target address, grab it now in case multiple instructions are used
ldr r0, =PhyStart

; Test-Clean-Invalidate D-Cache
10 mrc p15, 0, r15, c7, c14, 3
bne %b10

; drain write buffer
mcr p15, 0, r1, c7, c10, 4

; Invalidate I-Cache (if you are using it)
mov r1, #0
mcr p15, 0, r1, c7, c5, 0

; MMU off procedure
mrc p15, 0, r1, c1, c0, 0
; disable M bit
bic r1, r1, #(1 :SHL: 0)
mcr p15, 0, r1, c1, c0, 0 <-- This turns the MMU off, the pipeline will be prefetched already
nop
mov pc, r0
nop
nop

PhysStart
; get physical


Geoff
--

.

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