Re: DMA to SPI with descriptors (PXA27x)
- From: voidcoder <voidcoder@xxxxxxxxx>
- Date: Fri, 06 Oct 2006 22:33:30 +0200
Haven't seen any issues with the Memory<->SSP DMA on PXA.
It is not very clear what you are trying to do. May be
will be better if instead of "how" you will tell "what"
exactly are you trying to accomplish?
Fredrik Jansson wrote:
Hi!.
I have a working DMA-SPI implementation on a Mainstone III BSP.
I want to rewrite it to get zero-copies and have the following:
I run SDIO over SPI which means I send a command 53 "around" the data, the data size is also limited to 512 bytes per SDIO command 53.
In my working implementaion I build a buffer as follows for the receieve path
cmd53|dummy data 0|cmd53 post|cmd 53|dummy data 1|...
After that I set up one TX DMA and one RX DMA (one DMA descriptor each) working on that large buffer against SPI and it works well (using SPI flow control).
The result is:
cmd53|real data 0|cmd53 post|cmd 53|real data 1|...
The problem is that I have to manually copy the resulting data into a contineous buffer at the end.
The copying is what I want to get rid of.
Therefore I create three DMA descriptor for RX and three for TX and I set them up as follows:
rx_desc_0->trash_buffer (I'm not interested in the SDIO result)
rx_desc_1->data_buffer
rx_desc_2->trash_buffer
tx_desc_0->cmd_53_buffer
tx_desc_1->dummy data buffer
tx_desc_2->cmd_53 post buffer
I run the very same DMA function with the exception I have three linked descriptors in each direction.
All of a sudden I get SPI RX FIFO overruns and other undefined behaviour.
I both cases I pad the data to get a total size that's an even multiple of the SPI RX threshold (8 in my case).
Are there any special precautions that have to be taken when using linked descriptor with SPI flow control?
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