Memory map in Smdk - 2410 bootloader

Hi Everybody,

I was going through the code of bootloader for smdk - 2410.

#################################################
20 add r11, pc, #g_oalAddressTable - (. + 8)
ldr r10, =PTs ; (r10) = 1st level page table

; Setup 1st level page table (using section descriptor)
; Fill in first level page table entries to create "un-mapped" regions
; from the contents of the MemoryMap array.
;
; (r10) = 1st level page table
; (r11) = ptr to MemoryMap array

add r10, r10, #0x2000 ; (r10) = ptr to 1st PTE for
"unmapped space"
mov r0, #0x0E ; (r0) = PTE for 0: 1MB cachable
bufferable
orr r0, r0, #0x400 ; set kernel r/w permission
25 mov r1, r11 ; (r1) = ptr to MemoryMap array

30 ldr r2, [r1], #4 ; (r2) = virtual address to map Bank
at
ldr r3, [r1], #4 ; (r3) = physical address to map from
ldr r4, [r1], #4 ; (r4) = num MB to map

cmp r4, #0 ; End of table?
beq %f40

ldr r5, =0x1FF00000
and r2, r2, r5 ; VA needs 512MB, 1MB aligned.


ldr r5, =0xFFF00000
and r3, r3, r5 ; PA needs 4GB, 1MB aligned.

add r2, r10, r2, LSR #18
add r0, r0, r3 ; (r0) = PTE for next physical page

35 str r0, [r2], #4
add r0, r0, #0x00100000 ; (r0) = PTE for next physical page
sub r4, r4, #1 ; Decrement number of MB left
cmp r4, #0
bne %b35 ; Map next MB

bic r0, r0, #0xF0000000 ; Clear Section Base Address Field
bic r0, r0, #0x0FF00000 ; Clear Section Base Address Field
b %b30 ; Get next element

40 tst r0, #8
bic r0, r0, #0x0C ; clear cachable & bufferable bits
in PTE
add r10, r10, #0x0800 ; (r10) = ptr to 1st PTE for
"unmapped uncached space"
bne %b25 ; go setup PTEs for uncached space
sub r10, r10, #0x3000 ; (r10) = restore address of 1st
level page table

; Setup mmu to map (VA == 0) to (PA == 0x30000000).
ldr r0, =PTs ; PTE entry for VA = 0
ldr r1, =0x3000040E ; uncache/unbuffer/rw, PA base ==
0x30000000
str r1, [r0]

; uncached area.
add r0, r0, #0x0800 ; PTE entry for VA = 0x0200.0000 ,
uncached
ldr r1, =0x30000402 ; uncache/unbuffer/rw, base ==
0x30000000
str r1, [r0]

; Comment:
; The following loop is to direct map RAM VA == PA. i.e.
; VA == 0x30XXXXXX => PA == 0x30XXXXXX for S3C2400
; Fill in 8 entries to have a direct mapping for DRAM
;
ldr r10, =PTs ; restore address of 1st level page
table
ldr r0, =PHYBASE

add r10, r10, #(0x3000 / 4) ; (r10) = ptr to 1st PTE for
0x30000000

add r0, r0, #0x1E ; 1MB cachable bufferable
orr r0, r0, #0x400 ; set kernel r/w permission
mov r1, #0
mov r3, #64
45 mov r2, r1 ; (r2) = virtual address to map Bank
at
cmp r2, #0x20000000:SHR:BANK_SHIFT
add r2, r10, r2, LSL #BANK_SHIFT-18
strlo r0, [r2]
add r0, r0, #0x00100000 ; (r0) = PTE for next physical page
subs r3, r3, #1
add r1, r1, #1
bgt %b45

ldr r10, =PTs ; (r10) = restore address of 1st
level page table
####################################################

In the above code snippet at first the page table entries are created for
mapping of physical memory from 0x30000000 to virtual address 0x80000000.

But later 8Mb of memory is being direct mapped from 0x30000000 to 0x30000000
of virtual memory. What is the need of the second memory mapping?

Also in the first mapping the bit which needs to be set for backward
compatiability is not being set as it is done in the second mapping.

Second one it was mentioned that the virtual memory needs to be of 512 MB
with 1 MB aligned. Why is this restriction?

Any leads in this regard would be of great help.

Thanks in Advance,
Naveen Atmakuri.

.

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