Re: WinCE on x86

Tech-Archive recommends: Repair Windows Errors & Optimize Windows Performance

What code are you using for the OAL? What version of OS release?

You should verify that the system is entering OEMIdle and that it is
actually halting the CPU. If you are using the MS CSP code for x86 this
should be happening assuming you don't have threads spinning.

Also, what method are you using to measure that the CPU power is 4x? Or is
it overall system power?

--
Thanks,
John Eldridge
This posting is provided "AS IS" with no warranties, and confers no rights.


"Ansuya" <Ansuya@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:499566D7-31C8-4079-B461-F69C432F3B53@xxxxxxxxxxxxxxxx
I see higher power consumption even without running anything - just the OS.
Ansuya

"Chris Tacke [MVP]" wrote:

CE uses floating point emulation even on x86, so if you have any floating
point stuff going on, that will make a large difference.

-Chris


"Ansuya" <Ansuya@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:6C6719E4-E847-4203-BB6D-0A8E3C5E0DE7@xxxxxxxxxxxxxxxx
Thanks Paul. The real question is that I am getting 4x CPU power
consumption
for WinCE on x86 as compared to WinXP. As WinCE has very small memory
footprint, I was expecting the other way around. Do you have any
suggestions
why it may be behaving so.
Also is there PerfMon type tool for standalone WinCE to find out what
is
taking most of CPU time.
Ansuya

"Paul G. Tobey [eMVP]" wrote:

It works just fine. The compilers provided in eMbedded Visual C++,
Visual
Studio 2005, etc. target each of the processors that Windows CE works
with.
So, they take:

int main( void )
{
return 1;
}

and translate it into whatever is appropriate for the target
processor,
regardless of whether it's RISC or CISC. A given CISC instruction
probably
*does* take more CPU cycles (that's kind of the point of RISC), but to
do
a
given job, you might need two or three RISC instructions and only one
CISC
instruction.

What's the real question here?

Paul T.


"Ansuya" <Ansuya@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:F056CDBB-6810-4DA5-ABB0-99A623DB3F96@xxxxxxxxxxxxxxxx
Hi,
Most of embedded platforms are RISC based. Since x86 processor is
CISC
based, how WinCE operates on x86 platform? Is WinCE for x86 designed
from
ground up with CISC instructions or there is some translation from
CISC
to
RISC involved? Is it done in software on the fly? Does it take more
CPU
cycles?
Thanks,
Ansuya










.

Relevant Pages

  • Re: non load/store architecture?
    ... CISC, i.e. having arithmetic instructions that can access memory, i.e. ... the x86 architecture we love to hate, ... Programmers can write great code on a RISC ... Especially in a PC marketplace dominated by the x86. ...
    (comp.arch.embedded)
  • Re: CISC vs RISC concepts -- from an assembly view
    ... And RISC CPUs rely their speed on _compiler_ optimizations (converting ... CISC is winning in the PC market because CISC chips have become so cheap. ... In the late 1970s and early '80s, IBM decided to use Intel chips in their first PCs, mostly because Intel agreed to allow other vendors to produce compatible chips. ... This gave IBM a feeling of security that even if Intel went out of business, there would still be x86 chips to be had at a reasonable price. ...
    (comp.lang.asm.x86)
  • Re: Are 80x86 badly designed processors ?
    ... > x86 are CISC but RISC processors take more advantage of the hardware. ...
    (comp.lang.asm.x86)
  • Re: WinCE on x86
    ... I am using WinCE 5.0 provided BSP for x86 in Platform builder. ... This higher value of CPU power stays even if I don't use any applications - ... regardless of whether it's RISC or CISC. ...
    (microsoft.public.windowsce.platbuilder)
  • Re: WinCE on x86
    ... CE uses floating point emulation even on x86, so if you have any floating ... for WinCE on x86 as compared to WinXP. ... regardless of whether it's RISC or CISC. ...
    (microsoft.public.windowsce.platbuilder)