PXA255 NSSP problem in SPI mode

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Dear all,

I'm developing a WinCE driver for a peripheral attached to the NSSP
port of a PXA255 processor.
NSSP port is configured in SPI mode 0, SPI bus master (Clock and Frame
master), data size = 8bit, and is used in PIO mode (so no DMA and no
Interrupts just polling).
I'm currently testing the port in Loopback mode (I've tried internal
loopback or external loopback shorting RX and TX pins).

I've encountered this problem:
>>From PXA developer's manual I thought that writing a byte to TxFifo and
waiting for TxFifo to be empty would cause RxFifo to contain a byte
(SPI is full-duplex so if I transmit a byte I also receive a byte).
But after writing a byte to TxFifo and waiting for Tx completion,
RxFifo is empty.
What is really strange is that writing a second byte causes RxFifo to
contain the first byte transmitted and so on.

For example:
1) Write 0x01 -> RxFifo Empty
2) Write 0x02 -> RxFifo contains 1 byte with value 0x01
3) Write 0x03 -> RxFifo contains 1 byte with value 0x02
and so on.

It seems that NSSP controller has an hidden Rx buffer where data is
stored prior to putting it in RxFifo on the arrival of another byte.

Is that behaviour correct or am I making some kind of error?
Has anybody esperienced this kind of behaviour?

Thanks for the kind reply
Claudio

.

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