Re: Steppingstone and bootloader - part II

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Steve,
I have some good news, then! I based my response on the fact that we're
using a DOC chip that utilizes a ~1kb initial bootloader to load a
secondary bootloader. I did not write this part myself, but after
double-checking with the guy who wrote the code and set up the project
he confirms It's all compiled and linked with PB5 tools only. We use a
pxa270 so it might be compiler/linker dependant, but looking at the
resulting 0x800 byte .nb0 file, I see a nice continous chunk of code
without the 4kb jump.

So, the good thing is it can be done! He admitted he'd tweaked around
for quite a while berofe everything fell into place but here's the .bib
file he produced:

MEMORY

; Name Start Size Type
; ------- -------- -------- ----
IPLBOOT 00000000 00001800 RAMIMAGE
RAM 00004000 00000800 RAM

CONFIG
BOOTJUMP=NONE
COMPRESSION=ON
PROFILE=OFF
KERNELFIXUPS=ON
SRE=ON
ROMFLAGS=0
ROMSTART=00001000
ROMSIZE=800
ROMWIDTH=32

MODULES

; Name Path
Memory Type
; ------ ----------------------------------------------
-----------
nk.exe
$(_TARGETPLATROOT)\target\$(_TGTCPU)\$(WINCEDEBUG)\iplboot.exe IPLBOOT


He also mentioned that he had to tweak the startup code a little with a
jump and some DCD "padding". Here's a snippet:
<snip>
STARTUPTEXT

LEAF_ENTRY StartUp

ALIGN 32

b Start ; Seems necessary to start by branch

DCD 0, 0, 0 ; @4
DCD 0, 0, 0, 0 ; @10

Start

bl PREINIT

bl INITGPIO

</snip>

Henrik Viklund

.

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