Re: Will OEMinterruptHandler be preempted by a higher priority IRQ?

For completeness, it should be noted that this is ARM specific. On ARM, the
ISR is entered with interrupts disasbled (must explicitly re-enable to allow
nesting as Steve points out), but on MIPS, SHx, and x86, an OEM can
configure the kernel to enter the ISR with some higher priority interrupts
enabled (under OEM control). Of course, caution must still be exercised to
ensure that the ISR code is re-entrant safe.



John Eldridge
Microsoft Corporation
KITL First. Ask questions later!
http://blogs.msdn.com/kitlfirst

Disclaimer: This posting is provided "as is" with no warranties, and
confers no rights.

~~~~~~~~~~~~~~~


"Dean Ramsier" <ramsiernospam@xxxxxxxxxx> wrote in message
news:eQPXaGeZFHA.1040@xxxxxxxxxxxxxxxxxxxxxxx
> Correct
>
> --
> Dean Ramsier - eMVP
> Vibren Technologies
> http://www.vibren.com/Products/schema_bsp.htm
>
>
> "news.microsoft.com" <li.ning@xxxxxxxxxxxxxxxx> wrote in message
> news:%23ywy9LaZFHA.3272@xxxxxxxxxxxxxxxxxxxxxxx
>> Then you mean that by default in OEMInterruptHander(), interrupt has been
>> disabled by the kernel, so it will not be re-enter?
>>
>>
>> "Steve Maillet (eMVP)" <nospam1@xxxxxxxxxxxxxxxxxxxxxxx> wrote in message
>> news:O$z7WFaZFHA.4036@xxxxxxxxxxxxxxxxxxxxxxx
>> > Wrong, Windows CE does support nested interrupts. However YOUR OAL must
>> > enable interrupts in OEMInterrupthandler and ALL branches of that
> function
>> > and any Installable ISRs must be written to take into account that they
>> may
>> > be executed with interrupts on. This is not enabled by default because
> of
>> > the added complexity.
>> >
>> > --
>> > Steve Maillet
>> > EmbeddedFusion
>> > www.EmbeddedFusion.com
>> > smaillet at EmbeddedFusion dot com
>> >
>> >
>>
>>
>
>


.

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