Re: Nesting interrupts with ARM core

From: Steve Maillet \(eMVP\) (nospam1_at_EntelechyConsulting.com)
Date: 02/24/05 

Date: Fri, 25 Feb 2005 08:35:01 +1300

The ARM core has only a single interrupt vector. However virtually ALL CPUs
that have the ARM core have some sort of interrupt controller that you can
quickly read to determine the first level interrupt sources. (You can call
those IRQs) Normally the OEMInterruptHandler in the OAL will read the
interrupt controller to determine the highest priority pending Interrupt
request and return the SYSINTR_ ID for that device. 

-- 
Steve Maillet
EmbeddedFusion
www.EmbeddedFusion.com
smaillet at EmbeddedFusion dot com

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