Re: Problem writing to directly flash while IPSM running
From: Brian Price (brianp_at_appliedcs.com.au)
Date: 06/24/04
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Date: 24 Jun 2004 16:09:12 -0700
Hi
We are using the Intel Strata Flash 28F640J3A120 chips.
Reading of the specification would seem to indicate that if an erase
is in progress then before anything else can run, the erase suspend
command should
be issued. Similarly, when writing the program.
So, if I understand this right, for my application to work I need to
have the code running out of RAM AND disable interrupts to prevent
access to the flash.
If this is the case then is it sufficient to mark a module as SHC to
get it to run out of RAM.
Following on from that - how do I disable interrupts from the device
driver that is doing the operation. It runs at User mode level. Do I
need to switch to kernel mode to disable interrupts? Or should I
provide a mechanism in the OAL via OEMIoControl() to disable and
enable interrupts.
Thanks in Advance
Brian Price
brianprice_AT_appliedcs_DOT_com_DOT_au
"Robert Magyar" <RobertMagyar@discussions.microsoft.com> wrote in message news:<78500914-8A79-40B8-819E-EE64C5B57DE2@microsoft.com>...
> Check that your flash's device specification, to see if it says that you can run from one block while writing another, or if it says that you can run from
one bank while writing to a different bank. Often you can not read,
from a
bank, that you are writing to.
> --
> Robert
>
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