Memory Map Accelent Board

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From: Peter (Peter_at_discussions.microsoft.com)
Date: 06/22/04 

Date: Tue, 22 Jun 2004 09:10:01 -0700

Hi:

I am working on a custom bootloader using accelent board till getting my custom board.

I derived in a great difficulty the following memory map for Accelent. Till i don;t know whether the derived memory map is correct / not.
If anyone already have the memory map for Accelent PXA255 IDp please share with me. It will be of great help.

I am using MONICE from EPI Tools to debug the WinCE 4.2 bootloader. I tried to blink an LED D18 as a first step. I couldn't succeed. I got error saying
"Memory location is read only "

Please share with me your experience if you have faced similar problems.

The following are the Memory map which i derived.
Flash –
Intel
Strata flash
CS0 --> 0
Size --> 32 MBytes
Base Address --> 0x0000 0000
End Address --> 0x01FF FFFF

Disk On Chip
CS0 --> 1
Size --> 32 MBytes
Base Address --> 0x0400 0000
End Address --> 0x5FF FFFF

Baseboard
Registers/CPLD
Registers
CS0 --> 5
Size --> --
Base Address --> 0x17C0 0000
End Address --> --

SDRAM Bank-0
CS0 --> BSC0
Size --> 64 MBytes
Base Address --> 0xA000 0000
End Address --> 0xA3FF FFFF

SDRAM Bank-1
CS0 --> Not Used
Size --> 64 MBytes
Base Address --> 0xA400 0000
End Address --> 0xA7FF FFFF

SDRAM Bank-2
CS0 --> Not Used
Size --> 64 MBytes
Base Address --> 0xA800 0000
End Address --> 0xA7FF FFFF

SDRAM Bank-3
CS0 --> Not Used
Size --> 64 MBytes
Base Address --> 0xAC00 0000
End Address --> 0xABFF FFFF

Ethernet
Controller
CS0 --> 5
Size --> ---
Base Address --> 0x1740 0000
End Address --> --

Memory
mapped
register - LCD
CS0 --> --
Size --> --
Base Address --> 0x4400 0000
End Address --> 0x47FF FFFF

Memory
mapped
registers
– Peripherals
CS0 --> --
Size --> --
Base Address --> 0x4000 0000
End Address --> 0x 43FF FFFF

Memory
mapped
registers
– memory
controller
CS0 --> --
Size --> --
Base Address --> 0x4800 0000
End Address --> TBD

Thank you,
Peter

Relevant Pages

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