Re: PXA270 I2C register mapping

Anyone knows?

Thanks

On May 25, 4:49 pm, shai <sha...@xxxxxxxxx> wrote:
Hi,
I wanted to ask if someone can explain to me how the following mapping
works without a problem:

In the spec, the I2C registers are specified as:
0x4030_1680 IBMR I2C Bus Monitor register 9-30
0x4030_1684 — reserved —
0x4030_1688 IDBR I2C Data Buffer register 9-29
0x4030_168C — reserved —
0x4030_1690 ICR I2C Control register 9-23
0x4030_1694 — reserved —
0x4030_1698 ISR I2C Status register 9-26
0x4030_169C — reserved —
0x4030_16A0 ISAR I2C Slave Address register 9-28

When wanting to map them, the following code is used:

RegPA.QuadPart = BULVERDE_BASE_REG_PA_I2C;
pI2CRegs =(volatile XLLP_I2C_T *) MmMapIoSpace(RegPA,
sizeof(XLLP_I2C_T),FALSE);

when BULVERDE_BASE_REG_PA_I2C is 0x40300000.
the struct XLLP_I2C_T is defined as:
typedef struct
{
                XLLP_VUINT32_T IBMR;             /* Bus monitor
register */
        XLLP_UINT32_T RESERVED1;        /* addr. offset 0x84-0x88 */
        XLLP_VUINT32_T IDBR;    /* Data buffer Register */
        XLLP_UINT32_T RESERVED2;        /* addr. offset 0x8C-0x90*/
        XLLP_VUINT32_T ICR;     /* Global Control Register */
        XLLP_UINT32_T RESERVED3;        /* addr. offset 0x94-0x98 */
        XLLP_VUINT32_T ISR;     /* Status Register*/
                XLLP_UINT32_T RESERVED4;        /* addr. offset 0x9C-0xA0 */
        XLLP_VUINT32_T ISAR;    /* Slave address register */

} XLLP_I2C_T, *P_XLLP_I2C_T;

And everything works fine and nice.

My question is ->
Where in the code I posted does the systm take into account the 0x1680
offset between BULVERDE_BASE_REG_PA_I2C and the actual starting
address of the I2C registers?

Thanks in advance,
Shai

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