Re: EBOOT SMSC91C113L Ethernet registers not accessible

Tech-Archive recommends: Fix windows errors by optimizing your registry

From: Peter (arockiarajeshpeter_donot_spam_at_harita.com)
Date: 08/17/04 

Date: Tue, 17 Aug 2004 09:27:01 -0700

Hi Ken,
Thanks for your reply.
I found that Variable Latency I/O option was not enabled in MSC1 register of
PXA255. Hence, i couldn't acess the LAN91C113L Registers. Now, I am able to
acess. BUt, after this my EEPROM, where i program my MAC Address is not
accessible.

For accessing EEPROM of this ENEEP, IOS0-2 are open in my custom board.

FYI, my target LAN chip is LAN91C111 but due to unavailabiity of this i am
using LAN91C113L.

This is the error message i am getting.
///////////////////////////////////////////////////////////////////////////////////////////////
Ethernet Boot Loader Configuration:

0) IP address: 172.20.25.31
1) Subnet mask: 255.255.252.0
2) Boot delay: 10 seconds
3) DHCP: Enabled
4) Reset to factory default configuration
5) Download new image at startup
6) Program RAM image into FLASH: (Disabled)
7) Program SMSC MAC address
8) Boot device order: SMSC -> PCMCIA -> CF
9) Check image signature(s): (Disabled)
D) Download image now
F) Format flash (will not overwrite eboot or eboot parameters)
L) Launch existing flash resident image now

Enter your selection: d
Checking for SMC 91C113L Ethernet controller...
Entering SMCInit
SMC card not detected, I/O base 0xBF500000, BSR: 0x0000A00C
Checking for SMC 91C113L Ethernet controller...
Entering SMCInit
SMC Ethernet card detected at I/O base 0xBF500000
Peter SMC card detected, I/O base 0xBF500000, BSR: 0x00003301
SMC MAC Address: 169:178:1:51:169:178
SMC Ethernet card Config_Reg=B2A9
SMC Ethernet card Config_Base=0
SMC Ethernet card Switch=B2
SMC Ethernet card CONFIG_REG =2081
SMC Ethernet card CONTROL_REG =920
SMC Ethernet card RPCR_REG =30E0
SMC Ethernet card TCR_REG =81
SMC Ethernet card INTERRUPT_REG =0
SMC Ethernet card RCR_REG, =100
SMC Ethernet card REVISION_REG =BF50
SMC Reset complete
SMC MAC Address: 0:0:1:51:0:0
- Peter SMCInit
SMC 91C113L Ethernet controller initialized.
System ready!
Preparing for download...
INFO: Using device name: 'XSC1BD0'
InitDHCP():: Calling ProcessDHCP()
ProcessDHCP()::DHCP_INIT
SendFrame timeout waiting for TXEMPTY! INTERRUPT_REG = 0xC0
!EDBG error ::SendFrame()::Transmission Underrun
!EDBG error ::SendFrame()::Link Test Failed
!EDBG error ::SendFrame()::Receive Overrun
!EDBG error ::SendFrame()::Late Collision
!EDBG error ::SendFrame()::Transmission Deferred
!EDBG error ::SendFrame()::Last Frame Was Broadcast
!EDBG error ::SendFrame()::16 Collisions Reached
!EDBG error ::SendFrame()::Last Frame Was Multicast
!EDBG error ::SendFrame()::Multiple Collisions Detected
!EDBG error ::SendFrame()::Single Collion Detected
!EDBG error ::SendFrame()::Transmit Successful
!EDBG error ::SendFrame()::EPH Reg E2DFh
!OEMEthSendFrame failure, retry 1
Timed out waiting for ALLOC_INT
SendFrame return with wCompoletionCode=E2DF
!OEMEthSendFrame failure, ret
///////////////////////////////////////////////////////////////////////////////////////////////

Please suggest me.

Thanks & Regards,
Peter.

"Ken Christensen" wrote:

> Peter,
> Unless things have changed for the 91c113, all access to the registers need
> to be 8 bit (Byte) wide operations. The bus must be configured as an 8 bit
> bus to properly access the chip. This is the historical method that SMSC used
> for their chips. I am using the 91c111, which I am assuming is very close to
> the 91c113.
>
> Check your bus configuration parameters. Also, verify the bus cycle timing
> meets the requirements for the chip
>
>
> "Peter" wrote:
>
> > Hi Steve,
> >
> > First, Thanks for your reply.
> >
> > I did all verification on our controller data and address lines mapping,
> > it's fine.
> >
> > I am using Lubbock Sample boot code (provided for LAN91C96) i am using
> > LAN91C113L. Except some registers and 16-bit access, all others are same.
> >
> > Here, one thing i observed in code,
> >
> > When i write any particular register (say, TCR of BANK0) and wait for 5 secs
> > and read it. I could see the same value.
> >
> > But, when i write all the SMSC Configuration registers and then I read
> > registers one by one, i am getting the BANK Selection register value always.
> > I taken care the Read only registers and rd/wr registers here.
> >
> > Basically, Our custom hardware is based on Accelent Board, hence, address
> > line A1 of SMSC Chip is grounded, but it is connected to A2 of PXA in
> > Lubbock, hence, i changed the offset - multiplier in my code and connected
> > SMSC address lines one to one and trying.
> >
> > Could you please help me out.
> >
> > Thanks & Regards,
> > Peter.
> >
> > "Steve Maillet (eMVP)" wrote:
> >
> > > smells like a hardware problem check all the address and data lines and
> > > decoding as it looks like the registers are accessible since the init works.
> > > But the frame receive isn't working so I'm guessing something is wrong in
> > > the hardware wire up. (Can you use a packet sniffer to see if the chip is
> > > sending out the DHCP requests?.
> > >
> > > --
> > > Steve Maillet
> > > EmbeddedFusion
> > > www.EmbeddedFusion.com
> > >
> > > Do have an opinion on the effectiveness of Microsoft Windows Mobile and
> > > Embedded newsgroups? Let us know!
> > > https://www.windowsembeddedeval.com/community/newsgroups
> > >
> > >
> > >