Re: Watch Dog Activation, generate Exception Error 0xC0000005

Pretty sure that you need to clear the status register and setup the
interrupt. Look at OSSR and OIER.

Also reading oscr and then doing the debug output and waiting for a key
press before setting osmr3 is probably not a good idea. What you are doing
is fairly time sensitive, getchar is inconsistent with that. If the timer
rolls past the value that you are setting in the match register it can be
quite some time before the watchdog trips.

--
Bruce Eitman (eMVP)
Senior Engineer
beitman AT applieddata DOT net

Applied Data Systems
www.applieddata.net
An ISO 9001:2000 Registered Company
Microsoft WEP Gold-level Member


"efren" <efren@xxxxxxxxxxxxxxxxxxxxxxxxx> wrote in message
news:92D82704-E269-4B4A-A2D4-CC92571371F1@xxxxxxxxxxxxxxxx
> I'm trying to activate the watchdog fuction in an XScale SBC with WinCE.
> What I'm doing wrong????
>
> The followinf is the code:
>
> // WatchDogTest.cpp : Defines the entry point for the console application.
> //
>
> #include "stdafx.h"
>
>
> // WDT Registers Involved
> // Registers Clocked by 3.6864 MHz Oscillator ( 0.271267361 usec )
>
> //
> // OST (os timer)
> //
>
> typedef struct
> {
> unsigned long osmr0; //OS timer match register 0
> unsigned long osmr1; //OS timer match register 1
> unsigned long osmr2; //OS timer match register 2
> unsigned long osmr3; //OS timer match register 3
> unsigned long oscr; //OS timer counter register
> unsigned long ossr; //OS timer status register
> unsigned long ower; //OS timer watchdog enable register
> unsigned long oier; //OS timer interrupt enable register
> } OST_REGS, *POST_REGS;
>
>
> typedef struct
> {
> unsigned long rcsr; //Reser Controller Status Register
>
> } RSC_REGS, *PRSC_REGS;
>
>
>
> ///////////////////////////////////////////
> //
> // MEMORY-MAPPED REGISTERS (perifs)
> //
>
> #define CACHED_TO_UNCACHED_OFFSET 0x20000000
>
> #define PERIF_BASE_PHYSICAL 0x40000000
> #define PERIF_BASE_C_VIRTUAL 0x86200000
> #define PERIF_BASE_U_VIRTUAL (PERIF_BASE_C_VIRTUAL +
> CACHED_TO_UNCACHED_OFFSET)
>
> #define OST_OFFSET 0x00A00000 // OS Timer
>
> #define OST_BASE_PHYSICAL (PERIF_BASE_PHYSICAL + OST_OFFSET)
> #define OST_BASE_C_VIRTUAL (PERIF_BASE_C_VIRTUAL + OST_OFFSET)
> #define OST_BASE_U_VIRTUAL (PERIF_BASE_U_VIRTUAL + OST_OFFSET)
>
> // RESET CONTROLLER STATUS REGISTERS
>
> #define RSC_OFFSET 0x00F00030
>
> #define RSC_BASE_PHYSICAL (PERIF_BASE_PHYSICAL + RSC_OFFSET)
> #define RSC_BASE_C_VIRTUAL (PERIF_BASE_C_VIRTUAL + RSC_OFFSET)
> #define RSC_BASE_U_VIRTUAL (PERIF_BASE_U_VIRTUAL + RSC_OFFSET)
>
>
> //////////////////////////////////////////////
> CRITICAL_SECTION WD_Critsect;
>
> volatile OST_REGS *v_pOSTReg = (volatile OST_REGS *)OST_BASE_U_VIRTUAL;
> //volatile OST_REGS *v_pOSTReg = (volatile OST_REGS *)OST_BASE_C_VIRTUAL;
> //volatile OST_REGS *v_pOSTReg = (volatile OST_REGS *)OST_BASE_PHYSICAL;
>
>
>
> bool restart_wd () {
>
> DWORD osmr3;
>
> printf("Entering Critical Session\n\r");
> getchar();
>
> EnterCriticalSection(&WD_Critsect);
>
> printf("Critical Session OK\n\r");
> printf("Reading oscr register -> osmr3\n\r");
> getchar();
>
> osmr3 = v_pOSTReg->oscr; //Read OS Timer
>
> printf("osmr3 Var Updated\n\r");
> printf("Updating v_pOSTReg->osmr3 Register\n\r");
> getchar();
>
> v_pOSTReg->osmr3 =osmr3+0x0B000000;
>
> printf("Added 0x0B000000\n\r");
> printf("Activating (ower) WD Register\n\r");
> getchar();
>
> v_pOSTReg->ower |=0x00000001 ;
>
> printf("WatchDog Activated\n\r");
> printf("Leaving Critical Section\n\r");
> getchar();
>
> LeaveCriticalSection(&WD_Critsect);
>
>
>
> return (true);
> }
>
> void main()
> {
> printf("Testing the Watch Dog Timer\r\n");
>
> restart_wd ();
>
> printf("Watch Dog Restarted...... Please wait fot the Reset!!!!");
>
> printf("Press enter to exit\n\r");
>
> getchar();
>
> }
>
>


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