Re: The inaugural VB6 vs dot net test
- From: "Mike Williams" <mikea@xxxxxxxxxxxxxxxxx>
- Date: Mon, 3 Dec 2007 20:07:57 -0000
"Michael C" <nospam@xxxxxxxxxxx> wrote in message news:%23rpH6PeNIHA.4272@xxxxxxxxxxxxxxxxxxxxxxx
Chill out Mike I'm not trying to wind you up
Okay. Then do me a favour and try the code I posted earlier today (testing the speed of addressing memory in both a top down and a bottom up order) and post the results, together with details of your machine. Because of my previous experiences with my own desktop machine (AMD 3000+) I came to the conclusion that it was getting perhaps four pages of memory (or whatever) into the cache (whatever the page size is) each time a page border was crossed and that it was getting the pages "from that point in memory upwards", thereby causing it to collect four pages every time it crossed a page boundary when our code is accessing memory in "counting down" order (hence the sixty per cent reduction in speed in the "counting down" code when compared to the "counting up" code. I then assumed that all machines did the same. However, as I've said on many occasions, my own hardware experience at the chip level is almost twenty years out of date and things have moved on a lot since then. When I performed exactly the same test on my Intel Celeron laptop both routines (count down and count up) ran at the same speed and it appears (just a guess at the moment) that on my Intel Celeron laptop the processor might be getting those four pages (I'm only guessing "four" of course) using the currently required address as the "middle point" of the four pages (rather than as the "start point" as the AMD appears to do). As I've said, my own hardware experience at the chip level is very out of date and there are probably a lot of other things to take into account these days, so these are just pure guesses at the moment. Anyway, I would appreciate it if you would run the code (all optimizations on) and report the results and the details of your own machine.
Mike
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