Re: Dual processors?
- From: "Jim Carlock" <anonymous@localhost>
- Date: Wed, 15 Jun 2005 01:53:01 -0400
"MikeD" <nobody@xxxxxxxxxxx> wrote:
> I believe the same concept applies to MMX. Those are just
> additional instructions the processor supports. If you're doing
> something that applies to MMX, then the processor
> automatically offloads it to MMX.
Hi Mike,
1) Additional processor instructions,
2) Additional registers, and
3) Additional data types.
From...
IA-32 Intel Architecture Software Developers Manual
VOLUME 1: BASIC ARCHITECTURE
"The Intel MMX technology was introduced into the IA-32 architecture in
the Pentium II processor family and Pentium processor family with MMX
technology. The extensions introduced in MMX technology support a
single-instruction, multiple-data (SIMD) execution model that is designed
to accelerate the performance of advanced media and communications
applications.
9.1. OVERVIEW OF MMX TECHNOLOGY
"MMX technology defines a simple and flexible SIMD execution model to
handle 64-bit packed integer data. This model adds the following features
to the IA-32 architecture, while maintaining backwards compatibility with
all IA-32 applications and operating-system code:
* Eight new 64-bit data registers, called MMX registers
* Three new packed data types:
- 64-bit packed byte integers (signed and unsigned)
- 64-bit packed word integers (signed and unsigned)
- 64-bit packed doubleword integers (signed and unsigned)
* Instructions that support the new data types and to handle MMX state
management
* Extensions to the CPUID instruction
"MMX technology is accessible from all the IA32-architecture execution
modes (protected mode, real address mode, and virtual 8086 mode). It
does not add any new modes to the architecture.
"The following sections of this chapter describe MMX technology's
programming environment, including MMX register set, data types, and
instruction set. Additional instructions that operate on MMX registers
have been added to the IA-32 architecture in SSE/SSE2 extensions."
I'm not sure what the Pentium Pro option adds. Perhaps VB needs
to have that checked in order to implement MMX instructions. The
only other way I'm thinking is coding at a lower level, ie assembly.
Intel provides some documentation (.pdf's)...
http://developer.intel.com/design/pentium4/manuals/253668.htm
The "Software Developer's Manual, Volume 3" is kind of hidden on
that page for some odd reason, found here...
http://developer.intel.com/design/pentium4/manuals/25366815.pdf
>From stuff in the past, I vaguely recall that the OS handles most
everything regarding threading on multiprocessors, although I'm thinking
that VB might be tricked through various hacks (ie, multi-threading)
and running inline assembly in some fashion. I only wish I could provide
a demonstration. I don't have a multiprocessor system to run any tests
with.
Maybe the Intel documetation can help the OP in some way.
--
Jim Carlock
Please post replies to newsgroup.
I could very easily be wrong, but I think Windows dictates what gets done by
the first processor and what gets done by the second processor. I don't
think there's any way you can say "I want this action done by Processor1 and
this action done by Processor2". There might be, but I have NO idea how
you'd do it.
IOW, in both cases, I think it's beyond your control. If it were possible at
all, I think you'd have to use something more low-level than VB. Perhaps
C++ would support this, but I'd even think you'd have to go to Assembler.
Like I said, I could be wrong. That's just what I think.
--
Mike
Microsoft MVP Visual Basic
.
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