Re: Extending operator + (plus) for byte/short type

Tech-Archive recommends: Repair Windows Errors & Optimize Windows Performance



Jeroen Mostert wrote:
K Viltersten wrote:
While i know that the bytes are cheap today,
i still prefer to use a byte (or short) when i know that the entity counted isn't larger
than 255 (or 65k). However, it's a real pain
to cast every time i perform an operation.

Example:
private byte a, b;
public byte MyProperty
{ get { return (byte)(a + b); } }

It *should* be a pain. You get a good indication of the work the CPU has to do.

Operating on 32-bit integers is vastly more efficient for a 32-bit CPU than operating on bytes.

Usually X bit CPU means that the virtual addresses are X bits wide.

It does not say anything about register width, memory bus width, width
of instruction operands etc..

I am rather confident that modern CPU's are indeed more optimized for
operations on 32 bit entities than 8 bit entities (even though x86 is
traditionally very byte and short friendly), so I agree with your
conclusion, but I will not tie it the 32 bitness.

About the only time you encounter bytes is in byte arrays. Individual bytes are converted to ints for any nontrivial operation, and they should stay that way until you store them back.

Agree.

Public properties should basically never be smaller than an int, it doesn't pay (unless, again, you can show that you really need the memory) or when they're part of a predefined interop structure.

I would tend to let the modeling determine the type.

Arne
.



Relevant Pages

  • Re: Linux to support Massive Multi-Threading (or dies)!
    ... IHT isn't quite that, which is the reason it suffers ... A situation where there are 16 CPU cores on one chip is entirely ... access to a single memory bus, that means memory bandwidth will be the ...
    (comp.os.linux.misc)
  • Re: Linux to support Massive Multi-Threading (or dies)!
    ... IHT isn't quite that, which is the reason it suffers ... A situation where there are 16 CPU cores on one chip is entirely ... access to a single memory bus, that means memory bandwidth will be the ...
    (alt.os.linux)
  • Re: [Alsa-devel] Re: [OT] ALSA userspace API complexity
    ... CPU cycles in there ... ... you can do quite a bit of work on data in cache while you are waiting for the next cache line to load. ... not there will be a time when it's active transfering audio data :-). ... while the memory bus is busy transfering the audio data your cpu can only ...
    (Linux-Kernel)
  • Re: Speed Test between C and Fortran 95
    ... (but it won't scale by CPU MHz rating alone). ... Finally I enabled some Pentium Pro optimizations I noticed weren't ... memory bus to deliver the next load of data. ... will be the relative speeds of the CPU and memory bus, ...
    (comp.lang.fortran)
  • Re: Speed Test between C and Fortran 95
    ... (but it won't scale by CPU MHz rating alone). ... Finally I enabled some Pentium Pro optimizations I noticed weren't ... memory bus to deliver the next load of data. ... will be the relative speeds of the CPU and memory bus, ...
    (comp.lang.fortran)