MAKEFILE - only the first command ever works

From: Bonj (Bonj_at_discussions.microsoft.com)
Date: 12/09/04 

Date: Thu, 9 Dec 2004 05:57:04 -0800

If I enter the following makefile

!IF "$(unicode)"!="off"
uargs=/D"_UNICODE" /D"UNICODE"
!ELSE
uargs=
!ENDIF

!IFDEF debug
dargs=/Zi /D"_DEBUG"
!ELSEIFDEF release
dargs=/Ox /GA /D"RELEASE"
!ELSE
!ERROR specify "debug" or "release"
!ENDIF

t_mystring.obj :: t_mystring.cpp mystring.h
 $(CPP) $(uargs) $(dargs) /Yc"stdafx.h" /c t_mystring.cpp

b_mystring.obj :: b_mystring.cpp mystring.h
 $(CPP) $(uargs) $(dargs) /Yc"stdafx.h" /c b_mystring.cpp

only t_mystring.obj ever gets built.
Can someone please tell me why it won't execute more than one command.
The t_mystring.obj and b_mystring.obj both need to be built.

As far as I can tell from the documentation, I've entered two valid
"description blocks" and b_mystring.obj seems to be a valid target.
It doesn't complain or give out an error message, it just doesn't do it.

Can someone tell me why not please?

Thanks very much

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