Re: Bus Speed and HTT

Slava M. Usov wrote:
What exactly did you do with cpuid?

S

typedef struct cpuid_args_s {
DWORD eax;
DWORD ebx;
DWORD ecx;
DWORD edx;
} CPUID_ARGS;

void cpuid32(CPUID_ARGS* p) { // also defined as _CPUID
__asm {
mov edi, p
mov eax, [edi].eax
mov ecx, [edi].ecx // for functions such as eax=4
cpuid
mov [edi].eax, eax
mov [edi].ebx, ebx
mov [edi].ecx, ecx
mov [edi].edx, edx
}
}

BOOL CPUInfo::RetrieveCPUFeatures ()
{
int CPUFeatures = 0;
int CPUAdvanced = 0;

// Use assembly to detect CPUID information...
__try
{
// <<CPUID>>
// eax = 1 --> eax: CPU ID
// bits 31..16 - unused,
// bits 15..12 - type,
// bits 11..8 - family,
// bits 7..4 - model,
// bits 3..0 - mask revision
// ebx: 31..24 - default APIC ID,
// 23..16 - logical processsor ID,
// 15..8 - CFLUSH chunk size , 7..0 - brand ID
// edx: CPU feature flags
CPUID_ARGS ca = {1};
_CPUID(&ca);

CPUFeatures = ca.edx; //edx
CPUAdvanced = ca.ebx; //ebx
}
// A generic catch-all just to be sure...
__except (1)
{
return FALSE;
}

// Retrieve the features of CPU present.
m_Features.HasFPU = ((CPUFeatures & 0x00000001) != 0); // FPU Present --> Bit 0
m_Features.HasTSC = ((CPUFeatures & 0x00000010) != 0); // TSC Present --> Bit 4
m_Features.HasAPIC = ((CPUFeatures & 0x00000200) != 0); // APIC Present --> Bit 9
m_Features.HasMTRR = ((CPUFeatures & 0x00001000) != 0); // MTRR Present --> Bit 12
m_Features.HasCMOV = ((CPUFeatures & 0x00008000) != 0); // CMOV Present --> Bit 15
m_Features.HasSerial = ((CPUFeatures & 0x00040000) != 0); // Serial Present --> Bit 18
m_Features.HasACPI = ((CPUFeatures & 0x00400000) != 0); // ACPI Capable --> Bit 22
m_Features.HasMMX = ((CPUFeatures & 0x00800000) != 0); // MMX Present --> Bit 23
m_Features.HasSSE = ((CPUFeatures & 0x02000000) != 0); // SSE Present --> Bit 25
m_Features.HasSSE2 = ((CPUFeatures & 0x04000000) != 0); // SSE2 Present --> Bit 26
m_Features.HasThermal = ((CPUFeatures & 0x20000000) != 0); // Thermal Monitor Present --> Bit 29
m_Features.HasIA64 = ((CPUFeatures & 0x40000000) != 0); // IA64 Present --> Bit 30

// Retrieve extended SSE capabilities if SSE is available.
if (m_Features.HasSSE)
{
// Attempt to __try some SSE FP instructions.
__try
{
__m128 m; memset(&m,0,sizeof(m));
_mm_or_ps(m, m);
m_Features.HasSSEFP = TRUE;
}
// A generic catch-all just to be sure...
__except (1)
{
// bad instruction - processor or OS cannot handle SSE FP.
m_Features.HasSSEFP = FALSE;
}
} else {
// Set the advanced SSE capabilities to not available.
m_Features.HasSSEFP = FALSE;
}

// Retrieve Intel specific extended features.
if (m_ChipManufacturer == Intel) {
m_Features.ExtendedFeatures.SupportsHyperthreading = ((CPUFeatures & 0x10000000) != 0);
// Intel specific: Hyperthreading --> Bit 28
m_Features.ExtendedFeatures.LogicalProcessorsPerPhysical = (m_Features.ExtendedFeatures.SupportsHyperthreading) ? ((CPUAdvanced & 0x00FF0000) >> 16) : 1;
if ((m_Features.ExtendedFeatures.SupportsHyperthreading) && (m_Features.HasAPIC)){
// Retrieve APIC information if there is one present.
m_Features.ExtendedFeatures.APIC_ID = ((CPUAdvanced & 0xFF000000) >> 24);
}
}

return TRUE;
}


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