Interrupt Synchronization - WDF driver
- From: kota <kota@xxxxxxxxxxxxxxxxxxxxxxxxx>
- Date: Wed, 18 Jun 2008 11:03:00 -0700
Hi,
I am getting interrupt synchronization problems for my PCI device WDF driver
in SMP pc's, would like to hear the best solutions for interrupt
synchronization.
In multiprocessor(SMP) pc's, i have experienced that, when multiple
interrups generated for my device, interrupts are not recognised & serviced
properly by my DPC's, but it is working fine in single processor PC's.
using one H/W PCI interrupt(Not shared ), my pci device supports 10 software
interrupts using different enable registers. Int handler checks the interrupt
for my device or not and accordinlgly schedules the DPC's for further
interrupt processing.
In DPC's, some of the device hardware registers will be accessed and shall
be set/clear them accordingly.
In SMP pc's, while generating multiple interrupts continuosly in very short
intervals, observed that, only one interrupt was serviced correctly & rest
are not(bits got disabled for those interrupts).
To overcome this Multiple DPC synchronization & (b/w DPC, other Device
IOCTL's) synchronization, i have used WdfInterruptAcquireLock. Afer using
this, 90% of the times it is working fine, but success rate is not 100%.
Sometimes, while repeating the tests for multiple times, after few tests,
problem is coming again(I am thinking that, it is coming may be, it is
missing some interrupts?).
What i understood is, to synchronize b/w multiple DPC's, b/w DPC & other
therads, spinlock wont be helpful ,only WdfInterruptAcquireLock can do that
better.
Where as, previous version of this driver was developed in NT model, using
IoConnectInterrupt, interrupts are serviced, here, w/o any synchronization
methods, this is working fine for above tests in SMP pc's.
Is Interrupts DPC's handling is sequential for SMP pc's also for NT model? I
guess, in WDF model, SMP pc's, DPC scheduling is simulataneous based upon
processor availability, is this is true?
Is it possible to schedule the DPC's in WDF driver one after other in SMP
pc's also?, any option available?
Is there any other precautions to be taken to achieve 100% interrupt
synchronization?
Thanks,
Kota
.
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